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1. general description the 74hct534 is a high-speed si-gate cmos device and is pin compatible with low power schottky ttl (lsttl). the 74hct534 is speci?ed in compliance with jedec standard no. 7a. the 74hct534 is an octal d-type ?ip-?op featuring separate d-type inputs for each ?ip-?op and inverting 3-state outputs for bus oriented applications. a clock (cp) and an output enable ( oe) input are common to all ?ip-?ops. the 8 ?ip-?ops will store the state of their individual d-inputs that meet the set-up and hold times requirements on the low-to-high cp transition. when oe is low, the contents of the 8 ?ip-?ops are available at the outputs. when oe is high, the outputs go to the high-impedance off-state. operation of the oe input does not affect the state of the ?ip-?ops. the 74hct534 is functionally identical to the 74hct374, but has inverted outputs. 2. features n 3-state inverting outputs for bus oriented applications n 8-bit positive-edge triggered register n common 3-state output enable input. 3. quick reference data [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state rev. 03 18 october 2004 product data sheet table 1: quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6 ns. symbol parameter conditions min typ max unit t phl , t plh propagation delay cp to qn c l = 15 pf; v cc = 5 v - 13 - ns f max maximum clock frequency c l = 15 pf; v cc = 5 v - 40 - mhz c i input capacitance - 3.5 - pf c pd power dissipation capacitance per ?ip-?op c l = 50 pf; v cc = 4.5 v [1] [2] -19-pf
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 2 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state v cc = supply voltage in volts; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. [2] the condition is v i = gnd to v cc - 1.5 v. 4. ordering information 5. functional diagram table 2: ordering information type number package temperature range name description version 74HCT534N - 40 c t0 +125 c dip20 plastic dual in-line package; 20 leads (300 mil) sot146-1 74hct534d - 40 c t0 +125 c so20 plastic small outline package; 20 leads; body width 7.5 mm sot163-1 fig 1. functional diagram. mgm957 3-state outputs q0 q1 q2 q3 q4 q5 q6 q7 19 16 15 12 9 6 5 2 d0 d1 d2 d3 d4 d5 d6 d7 cp oe ff1 to ff8 18 11 1 17 14 13 8 7 4 3
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 3 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state fig 2. logic symbol. fig 3. iec logic symbol. mgm955 d0 d1 d2 d3 d4 d5 d6 d7 oe cp q0 q1 q2 q3 q4 q5 q6 q7 11 1 19 16 15 12 9 6 5 2 18 17 14 13 8 7 4 3 mgm956 19 16 15 12 9 6 5 11 c1 1 en 1d 2 18 17 14 13 8 7 4 3 fig 4. logic diagram. mgm958 q5 d5 d cp q ff 6 q4 d4 d cp q ff 5 q3 d3 d cp q ff 4 q2 d2 d cp q ff 3 q1 d1 d cp q ff 2 q0 oe cp d0 d cp q ff 1 q6 d6 d cp q ff 7 q7 d7 d cp q ff 8
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 4 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 6. pinning information 6.1 pinning 6.2 pin description fig 5. pin con?guration. 534 oe v cc q0 q7 d0 d7 d1 d6 q1 q6 q2 q5 d2 d5 d3 d4 q3 q4 gnd cp 001aab843 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 table 3: pin description symbol pin description oe 1 3-state output enable input (active low) q0 2 3-state output d0 3 data input d1 4 data input q1 5 3-state output q2 6 3-state output d2 7 data input d3 8 data input q3 9 3-state output gnd 10 ground (0 v) cp 11 clock input (low-to-high, edge-triggered) q4 12 3-state output d4 13 data input d5 14 data input q5 15 3-state output q6 16 3-state output d6 17 data input d7 18 data input q7 19 3-state output v cc 20 supply voltage
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 5 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 7. functional description 7.1 function table [1] h = high voltage level; h = high voltage level one set-up time prior to the low-to-high cp transition; l = low voltage level; i = low voltage level one set-up time prior to the low-to-high cp transition; z = high-impedance off-state; - = low-to-high clock transition. 8. limiting values [1] above 70 c: p tot derates linearly with 12 mw/k. [2] above 70 c: p tot derates linearly with 8 mw/k. 9. recommended operating conditions table 4: function table [1] operating mode input internal ?ip-?ops output qn oe cp dn load and read register l - llh l - hhl load register and disable outputs h - llz h - hhz table 5: limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7 v i ik input diode current v i < - 0.5 v or v i >v cc + 0.5 v - 20 ma i ok output diode current v o < - 0.5 v or v o >v cc + 0.5 v - 20 ma i o output source or sink current v o = - 0.5 v to v cc + 0.5 v - 35 ma i cc , i gnd v cc or gnd current - 70 ma t stg storage temperature - 65 +150 c p tot power dissipation dip20 package [1] - 750 mw so20 package [2] - 500 mw table 6: recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 4.5 5.0 5.5 v v i input voltage 0 - v cc v
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 6 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 10. static characteristics v o output voltage 0 - v cc v t r , t f input rise and fall times v cc = 4.5 v - 6.0 500 ns t amb ambient temperature see section 10 and 11 - 40 - +125 c table 6: recommended operating conditions continued symbol parameter conditions min typ max unit table 7: static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb =25 c v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 1.6 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - 1.2 0.8 v v oh high-level output voltage v i =v ih or v il ; v cc = 4.5 v i o = - 20 m a 4.4 4.5 - v i o = - 6 ma 3.98 4.32 - v v ol low-level output voltage v i =v ih or v il ; v cc = 4.5 v i o =20 m a - 0 0.1 v i o = 6.0 ma - 0.16 0.26 v i li input leakage current v i =v cc or gnd; v cc = 5.5 v - - 0.1 m a i oz 3-state off current v i =v ih or v il ; other inputs v cc or gnd; v o =v cc or gnd; i o =0a -- 0.5 m a i cc quiescent supply current v i =v cc or gnd; i o =0a; v cc = 5.5 v - - 8.0 m a d i cc additional quiescent supply current per input pin v i =v cc - 2.1 v; other inputs v i =v cc or gnd; v cc = 4.5 v to 5.5 v; i o =0a pin oe - 125 450 m a pin cp - 90 325 m a pins dn - 35 125 m a c i input capacitance - 3.5 - pf t amb = - 40 c to +85 c v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 - - v v il low-level input voltage v cc = 4.5 v to 5.5 v - - 0.8 v v oh high-level output voltage v i =v ih or v il ; v cc = 4.5 v i o = - 20 m a 4.4 - - v i o = - 6 ma 3.84 - - v v ol low-level output voltage v i =v ih or v il ; v cc = 4.5 v i o =20 m a - - 0.1 v i o = 6.0 ma - - 0.33 v i li input leakage current v i =v cc or gnd; v cc = 5.5 v - - 1.0 m a
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 7 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 11. dynamic characteristics i oz 3-state off current v i =v ih or v il ; other inputs v cc or gnd; v o =v cc or gnd; i o =0a -- 5 m a i cc quiescent supply current v i =v cc or gnd; i o =0a; v cc = 5.5 v --80 m a d i cc additional quiescent supply current per input pin v i =v cc - 2.1 v; other inputs v i =v cc or gnd; v cc = 4.5 v to 5.5 v; i o =0a pin oe - - 560 m a pin cp - - 405 m a pins dn - - 155 m a t amb = - 40 c to +125 c v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 - - v v il low-level input voltage v cc = 4.5 v to 5.5 v - - 0.8 v v oh high-level output voltage v i =v ih or v il ; v cc = 4.5 v i o = - 20 m a 4.4 - - v i o = - 6 ma 3.7 - - v v ol low-level output voltage v i =v ih or v il ; v cc = 4.5 v i o =20 m a - - 0.1 v i o = 6.0 ma - - 0.4 v i li input leakage current v i =v cc or gnd; v cc = 5.5 v - - 1.0 m a i oz 3-state off current v i =v ih or v il ; other inputs v cc or gnd; v o =v cc or gnd; i o =0a -- 10 m a i cc quiescent supply current v i =v cc or gnd; i o =0a; v cc = 5.5 v - - 160 m a d i cc additional quiescent supply current per input pin v i =v cc - 2.1 v; other inputs v i =v cc or gnd; v cc = 4.5 v to 5.5 v; i o =0a pin oe - - 610 m a pin cp - - 440 m a pins dn - - 170 m a table 7: static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit table 8: dynamic characteristics gnd = 0 v; v cc = 4.5 v; t r =t f = 6 ns; c l = 50 pf; see figure 9 symbol parameter conditions min typ max unit t amb =25 c t phl , t plh propagation delay cp to qn see figure 6 c l = 50 pf; v cc = 4.5 v - 16 30 ns c l = 15 pf; v cc = 5 v - 13 - t pzh , t pzl 3-state output enable time oe to qn see figure 7 - 1630ns
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 8 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. [2] the condition is v i = gnd to v cc - 1.5 v. t phz , t plz 3-state output disable time oe to qn see figure 7 - 1830ns t thl , t tlh output transition time see figure 6 - 5 12 ns t w clock pulse width high or low see figure 6 23 14 - ns t su set-up time dn to cp see figure 8 12 4 - ns t h hold time dn to cp see figure 8 5 - 1- ns f max maximum clock pulse frequency see figure 6 c l = 50 pf; v cc = 4.5 v 22 36 - mhz c l = 15 pf; v cc = 5 v - 40 - mhz c pd power dissipation capacitance per ?ip-?op [1] [2] -19-pf t amb = - 40 c to +85 c t phl , t plh propagation delay cp to qn see figure 6 --38ns t pzh , t pzl 3-state output enable time oe to qn see figure 7 --38ns t phz , t plz 3-state output disable time oe to qn see figure 7 --38ns t thl , t tlh output transition time see figure 6 --15ns t w clock pulse width high or low see figure 6 29--ns t su set-up time dn to cp see figure 8 15--ns t h hold time dn to cp see figure 8 5--ns f max maximum clock pulse frequency see figure 6 18 - - mhz t amb = - 40 c to +125 c t phl , t plh propagation delay cp to qn see figure 6 --45ns t pzh , t pzl 3-state output enable time oe to qn see figure 7 --45ns t phz , t plz 3-state output disable time oe to qn see figure 7 --45ns t thl , t tlh output transition time see figure 6 --18ns t w clock pulse width high or low see figure 6 35--ns t su set-up time dn to cp see figure 8 18--ns t h hold time dn to cp see figure 8 5--ns f max maximum clock pulse frequency see figure 6 15 - - mhz table 8: dynamic characteristics continued gnd = 0 v; v cc = 4.5 v; t r =t f = 6 ns; c l = 50 pf; see figure 9 symbol parameter conditions min typ max unit
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 9 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 12. waveforms v m = 1.3 v; v i = gnd to 3 v. fig 6. waveforms showing the clock (cp) to output ( qn) propagation delays, the clock pulse width, output transition times and the maximum clock pulse frequency. v m = 1.3 v; v i = gnd to 3 v. fig 7. waveforms showing the 3-state enable and disable times. mgm959 t phl 1/f max t plh t w v m v m cp input qn output t thl t tlh mgm961 t plz t phz outputs disabled outputs enabled 90 % 10 % outputs enabled oe input v m t pzl t pzh v m v m qn output low-to-off off-to-low qn output high-to-off off-to-high t r t f 90 % 10 %
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 10 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state v m = 1.3 v; v i = gnd to 3 v. fig 8. waveforms showing the data set-up and hold times for dn input. de?nitions test circuits: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance (see section 11 for the value). fig 9. load circuitry for switching times. mgm960 t h t su t h t su qn output cp input dn input v m v m v m mna101 v cc v i v o r t c l pulse generator d.u.t.
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 11 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 13. package outline fig 10. package outline sot146 (dip20). unit a max. 1 2 b 1 cd e e m h l references outline version european projection issue date iec jedec jeita mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot146-1 99-12-27 03-02-13 a min. a max. b z max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 6.40 6.22 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 2 4.2 0.51 3.2 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 0.25 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.078 0.17 0.02 0.13 sc-603 ms-001 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 20 1 11 10 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. (1) (1) (1) dip20: plastic dual in-line package; 20 leads (300 mil) sot146-1
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 12 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state fig 11. package outline sot163 (so20). unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec jeita mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 sot163-1 10 20 w m b p detail x z e 11 1 d y 0.25 075e04 ms-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.05 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale x q a a 1 a 2 h e l p q e c l v m a (a ) 3 a so20: plastic small outline package; 20 leads; body width 7.5 mm sot163-1 99-12-27 03-02-19
9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 13 of 15 philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 14. revision history table 9: revision history document id release date data sheet status change notice doc. number supersedes 74hct534_3 20041018 product data sheet - 9397 750 13817 74hc_hct534_ cnv_2 modi?cations: ? the format of this data sheet has been redesigned to comply with the new presentation and information standard of philips semiconductors ? information related to 74hc534 type is deleted ? reference to family speci?cations is replaced by the actual information. 74hc_hct534_ cnv_2 19980410 product speci?cation - - 74hc_hct534_1
philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 9397 750 13817 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 18 october 2004 14 of 15 15. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 16. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 17. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 18. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2004 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 18 october 2004 document number: 9397 750 13817 published in the netherlands philips semiconductors 74hct534 5 v octal d-type ?ip-?op; positive-edge trigger; inverting; 3-state 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 quick reference data . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 recommended operating conditions. . . . . . . . 5 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 15 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 16 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 17 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 18 contact information . . . . . . . . . . . . . . . . . . . . 14

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